Position: Analog Layout Engineer (RF/Analog IC Design) Location: Onsite- Vancouver, BC Job type: Full-Time/Permanent Hiring

Seeking an experienced Technology Lead – Analog Layout with strong expertise in RF/Analog custom layout, FinFET technologies, and deep sub-micron CMOS design. The role focuses on transistor-level layout development, verification, and optimization of high-performance RF and analog circuit blocks for advanced semiconductor platforms

. Key Responsibiliti esDesign and develop transistor-level layouts for RF/analog blocks including PLL, LNA, Mixer, ADC/DAC, PA, filters, and LDO s.Perform layout verification using DRC, LVS, ERC, extraction, and DFM flow s.Optimize layouts for matching, parasitic reduction, shielding, electromigration, and high-frequency routin g.Work with Cadence Virtuoso Layout XL and Calibre verification tool s.Support FinFET-based advanced node designs (N5/N3/N2 technologies ).Collaborate with RF designers and layout engineers to ensure high-quality layout deliver y.Must-Have Skil lsStrong experience in custom RF/Analog layout desig n.Expertise in FinFET technologies (N5/N3/N2 or advanced nodes ).Hands-on experience with Cadence Virtuoso Layout X L.Strong knowledge of Calibre DRC/LVS/ERC verification flow s.Understanding of deep sub-micron CMOS layout technique s.Experience with RF shielding, device matching, coupling, RC delay, and electromigratio

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