AMD jobs

  Work with high-speed, low power digital circuit designs from definition to implementationVerification of critical high speed digital designs using both coverage driven random and directed testing techniques as well as Formal verifi[...]

Enhancing and maintaining sophisticated production-level GPU AI technologies for our customers.Working primarily on Windows and Linux.Support, design and develop customer specific AI solutions, e.g. Large Language Models (LLM), Stable [...]

As a member of the GPU Technologies and Engineering (G&E) group, you will help bring to life cutting-edge designs. As a member of the Physical Design team, you will work closely with the architecture, IP design, front-end design/inte[...]

The successful candidate will report to the SOC DFT (Design-For-Test) Integration & Design Verification Manager and will have the following responsibilities:Develop RTL and integrate internal/external RTL logic into SoC (System-On-Chip[...]

AMD together we advance_ THE ROLE: As a member of the GPU Technologies and Engineering (G&E) group, you will help bring to life cutting-edge designs. As a member of the Physical Design team, you will work closely with the architectur[...]

AMD together we advance_ DESIGN VERIFICATION ENGINEER THE ROLE: As a member of the GPU Technologies and Engineering group, you will help bring to life cutting-edge designs. As a member of the front-end design/verification team, you w[...]

As a DC GPU Manufacturing Validation and Test Automation Engineer, you will work with a cross-functional organization to plan, develop, and validate test content and automation for AMD’s manufacturing test program.   Responsibiliti[...]

Develop and maintain block level IP and MP subsystem verification architecture, testbenches, test methodology and infrastructureDevelop and debug test plans using SystemVerilog/UVM constrained-random test methodology, C-DPI directed te[...]

Develop and maintain block level IP and MP subsystem verification architecture, testbenches, test methodology and infrastructureDevelop and debug test plans using SystemVerilog/UVM constrained-random test methodology, C-DPI directed te[...]

Verification of critical high speed digital designs using both coverage driven random and directed testing techniques.Work on various aspects of the Verification flow from initial test planning to coverage convergence and sign-off clos[...]